# An Introduction to Wafer Processing

Here’s a brief introduction to Silicon Wafer Processing I wrote (based on Chapter 2 of Fundamentals of BioMEMS and Medical Microdevices by Steven S. Saliterman).

Silicon dioxide Film Growth on Silicon Wafers

Silicon dioxide film can be produced through thermal oxidation. This can include dry, wet or pyrogenic oxidation. Dry oxidation uses rapid thermal annealing to react pure silicon with oxygen gas to create silicon dioxide. Doing this process with steam, wet oxidation, is faster but results in a poorer product due to the released H2 gas interfering with the SiO2 structure. Mostly SiO2 is formed in an atmospheric furnace. Thermal oxidation generates compressive stress and layers thicker than 1 micron may cause bowing. Silicon nitrate can be used as a low-stress thin film alternative.

Positive vs. Negative Photoresist

Both positive and negative photoresist are used to protect parts of the wafer beneath cured regions. Positive photoresist is initially hardened after it is spun on (with a soft bake) and then becomes acidic and soluble when exposed to light. The acidic region can then be developed off with solvent, leaving a photoresist pattern matching the chrome region of the mask. Positive resists are generally developed in KOH. Negative photoresist is susceptible to solvent when it is spun on, and crosslinks when exposed to light. After developing, the photoresist pattern is the inverse of the chrome region of the mask.Negative resists are generally developed in organic solutions.

PMMA (poly (methyl methacrylate)) and DQN (diazoquinone ester plus phenolic novolak resin) are positive resists.

SU-8, bis(aryl)azide rubber and Kodak KTFR are examples of negative resists.

UV Wavelengths for i- and g-line Photoresist

Near-UV light ranges from 350-500 nm. Mercury lamps have many high intensity peaks, of which the i-line is at 365 nm and the g-line is at 435 nm. Different photoresists are optimized for exposure at different wavelengths, and are often labeled as i or g line resists.

Common Terms and Theoretical Limit to Resolution Calculation

A critical dimension is the smallest feature size to be produced.

Resolution is the smallest line width to be consistently patterned.

Line width control refers to conditions that must be controlled to within 20% of the minimum feature size.

High intrinsic resist sensitivity is the photochemical quantum efficiency described by the quotient of the number of photo-induced events to the number of photons absorbed.

A g-value is the number of polymer scissions or crosslinks per 100 eV of absorbed energy.

The resist profile is the duration of exposure, scattering, positive versus negative resist, and solvent choice (all of which affect the edge profile).

Contact and proximity resolution are limited by the diffraction of light at the edge of an opaque feature, alignment of the wafer to the mask, non-uniformities in wafer flatness, and contamination.

$R = b_{min} = \frac{3}{2} \sqrt{\lambda\left(s + \frac{z}{2}\right)}$

Where $b_{min}$ is half the grating period and the minimum feature size transferable, $s$ is the gap between the mask and the photoresist surface, $\lambda$ is the wavelength of the exposing radiation, and $latex z$ is the photoresist thickness. This is about 1 micron with a no gap between the mask and the surface, a wavelength of 400 nm, and a photoresist thickness of 1 micron. Shorter wavelengths, smaller gaps, and thinner resist layers improve resolution.

Silicon Etching

Etching silicon can be done with dry etching (plasma) or wet etching (liquid chemicals). Each results in different isotropy properties. Within plasma dry etching there is glow discharge for two diodes and ion beam etch with tridiode setups. Glow discharge includes plasma etching (PE), reactive ion etching (RIE), and physical sputtering (PS). Ion beam etch includes ion beam milling (IBM), reactive ion beam etching (RIBE), and chemical assisted ion beam etching (CAIBE). Finally, deep reactive ion etching (DRIE) makes deep anisotropic grooves for high aspect ratio parts using inductively coupled plasma.

Plasma Etch – Argon is excited then accelerated toward an anode behind the wafer. These ions remove silicon from the wafer surface physically. Can use lower energy and less vacuum than other techniques.

Reactive Ion Etch – Electrons are oscillated back and forth with RF and collide with gas molecules to create a plasma. The plasma consists of positive cations, negative anions, radicals, and photons. Wafer is placed on cathode and the reactive ion sputter occurs. Ions for silicon etch are formed from gasses including SF6 and oxygen gas, which draws etch products away from the etching surface. Aluminum etch uses Chlorine gas. The reactive ions adsorb onto the layer’s surface, react, and then desorb back into the plasma (bulk gas). Best at low pressures (10 vs 40 mTorr) for dc plasma and both dielectrics and metals can be etched.

Physical Sputtering – Inert ions can also be used to sputter off parts of the substrate. Here, only the kinetic energy of the molecules cause the removal of material. Below 3 eV, particles are simply reflected or absorbed. 4-10 eV causes intermediate removal but 10-5,000 eV causes bond breakage and ballistic material ejection to a collecting surface. However, to prevent diffraction effects and re-deposition of material a long mean free path is required (low pressure and acceleration). Doping implantation occurs at 10,000-20,000 eV.

Ion Beam Milling – A hot filament serves as an ion source in an inert gas environment (i.e argon). The ions are accelerated into a beam and fired into the lower chamber where they hit the

target. Ions physically cause the removal of material.

Reactive Ion Beam Etch – Ions fired are reactive and etch the surface directly. Reactive ions come from ion source.

Chemical Assisted Ion Beam Etch – Ion bombardment induces a reaction by making the substrate surface more reactive for neutral plasma species. This results in clearing of film-forming reaction products and allows reactive neutrals to proceed in cleared areas. Reactive ions come from a separate gas that is flowed over the substrate such as Cl2. This etch results in highly anisotropic etch profiles and smooth vertical sidewalls.

Physical Vapor Deposition (PVD) and Chemical Vapor Deposition (CVD) for Creating Conductive and Dielectric Thin Films

Important thin films include silicon oxide, silicon dioxide (SiO2), polysilicon, silicon nitride (Si3N4), phosophosilicate glass (PSG), and metal films. In addition to PVD and CVD, epitaxial growth can be used. Epitaxial growth is the growth of a single crystal layer on a substrate seed layer. Vapor phase epitaxy and molecular beam epitaxy are both types of epitaxial growth.

Physical Vapor Deposition – Material is transported in vapor from a source to a substrate through vacuum or low pressure gaseous environment. Compound materials can be deposited by codeposition. There are various PVD techniques, but the main five are evaporation in a vacuum, sputtering, arc-vapor deposition, laser ablation, and ion plating. PVD is governed by Kinetic Theory to predict gas behavior. Condensation of sputtered atoms is based on equilibrium vapor pressure of the substances and determines if supersaturation can occur at the substrate. Impingement rates are high when many collisions per time that are made between the gas and deposition surfaces.

Impingement rate, $\Phi$, can be described with temperature, pressure and mw.

$latex \Phi = \frac{P}{\sqrt{2 \pi m k T}} = \frac{2.63 \times 10^{20} P}{\sqrt{MT}}$

where $m$ is the mass of the molecule ($M$ is molecular weight), $P$ is pressure in pascal and $T$ is temperature in Kelvin. Impingement is expressed in molecules/cm2-sec.  Since the radius of oxygen molecule is about 3.6 $\AA$, there will be 2.2×1014 molecules/cmassuming close packing.

We can also calculate the time to form a monolayer from impingement rates.

$t = \frac{N_s}{\Phi} = \frac{\sqrt{2 \pi m k T} N_s}{P}$

where $N_s$ is the number of molecules per area in cm2.

Evaporation – Can be either filament resistive (current though source filament, i.e gold or copper, causes change to vapor phase) or through electron beam heating (heat source using ions from a thermonic filament). Both techniques utilize heating of an ion source to change the source phase into a vapor. The ions are then accelerated to the substrate using a magnetic field. E beams are easily automated and high evaporation rates, making them good for refractory materials. However, this technique may result in radiation damage to the substrate. Evaporation occurs under ultrahigh vacuum.

Sputtering – Can be DC and RF, magnetron and reactive sputtering. All sputtering utilizes an energetic ion striking the surface of a sputtering target, dislodging target atoms from the surface. These atoms are ejected into a condensable vapor which can be accelerated to the substrate to form a thin, uniform coating of the target material on the substrate.

DC sputtering uses ions formed from excitation of argon gas. The number of target atoms ejected per incident ion (sputter yield) is determined by the kinetic energy of the voltage accelerated ion. Many metals can be sputtered, including refractory (high heat resistant metals) such as Ta, W, Mo, and TiC. The target is at a negative voltage of between 3 and 4 kV. DC sputtering is usually limited to metals because insulating targets cannot quickly drain positive charge resulting in a buildup of positive ions at the target surface that repels incoming positive ions and prevents sputtering.

RF sputtering circumvents this problem by alternating the polarization of the target. There is alternate attraction of positive sputtering ions and electrons that neutralize the positive sheath. With RF, both conductive and dielectric films can be deposited.

Magnetron sputtering uses a Helmholz coil to create magnetic fields with lines parallel to the target. As electrons follow field lines, they further ionize gas near the target which increases sputtering.

Reactive sputtering is simply flowing a reactive gas into the sputtering chamber which reacts with the sputtered material during acceleration and results in a sputtered compound on the substrate surface. Generally deposited material follows stoichiometric rules and can be oxides, carbides, or nitrides.

Chemical Vapor Deposition – Deposition of a solid on a heated surface from a chemical reaction in the vapor phase. CVD can be combined with PVD in Plasma Enhanced Chemic Vapor Deposition (PECVD) or activated sputtering. Advantages of CVD are high throwing power (can fill deep crevices, good step coverage) and no line of sight limitations. CVD can achieve thick (10’s of cm) coatings, doesn’t need high vacuum, and can be used for codeposition. However CVD must happen at high temperatures (> 600°C), use chemicals with high vapor pressure and toxicity, and have toxic by-products.

In CVD, reactant gasses are flowed into the reactor and diffuse through the boundary layer. These gasses then come into contact with the surface of the substrate, deposition takes place, and any gaseous byproducts are diffused away from the surface.

CVD is regulated based on epitaxy, gas-phase precipitation, and thermal expansion. Epitaxy is the growth of crystalline film using the substrate as a seed. Homeoepitaxy is when seed and growth are the same material and heteroepitaxy is when the two are different. Obviously, this growth doesn’t happen if there is a significant difference in structure of crystals and intermediate buffers are required. Gas phase precipitation is when CVD occurs in the gas rather than the substrate surface. For example, the formation of H2 during SILOX deposition, which creates a very porous low density film (usually a bad thing unless the goal is a powder). This powdery surface can be made more dense with a bake process, but in a limited way. Excessive differences in substrate and coating thermal expansion coefficients will result in cracking or high-stress films (wafer warping) as the coating cools.

From Berkeley EECS. (1) Diffusion of reactant to surface, (2) Absorption of reactant to surface, (3) Chemical reaction (4) Desorption of gas by-products, and (5) Outdiffusion of by-product gas.

From Berkeley EECS.

Silicon Dioxide can be formed with low temperature oxidation (LTO, a time-intensive process), tetraethylorthosilicate (TEOS, Si(OC2H5)4), high temperature oxidation (HTO) and PECVD.

Some interesting low pressure chemical vapor deposition (LPCVD) equations include:

Silane and Oxygen:

$\textup{SiH}_4+\textup{O}_2 \xrightarrow{500^{\circ}\textup{C}} \textup{SiO}_2 + 2\textup{H}_2$

Dichlorosilane:

$\textup{SiCl}_2\textup{H}_2+2\textup{H}_2\textup{O} \xrightarrow{900^{\circ}\textup{C}} \textup{SiO}_2 + 2\textup{H}_2 + 2\textup{HCl}$

Dicholorosilane and Ammonia:

$3\textup{SiCl}_2\textup{H}_2+4\textup{NH}_3 \xrightarrow{800^{\circ}\textup{C}} \textup{Si}_3\textup{N}_4 + 6\textup{HCl} + 6\textup{H}_2$

Mean Free Path

The mean free path of a gas molecule is the average distance the molecule travel before it collides with another molecule. This is important for ensuring there are only limited collisions in the deposition chamber, and as a result the deposited thin film is uniform.

The mean free path ($\lambda$) is described with the following equation:

$\lambda = \frac{kT}{\sqrt{2}\pi P d^2}$

Where $d$ is the diameter of the gas molecule in angstroms (usually 3-5 angstroms), $P$ is the gas pressure in pascal, and $T$ is the temperature in Kelvin of the system.

An example is sputtered aluminum (D = 2.5 $\AA$) at 100 Pa (MFP = 0.0149 cm and 10-5 Pa (MFP = 149,000 cm) at 300K.

Silicon Doping for Etch Property Modification

Ion implantation is achieved by ionizing the dopant element (phosphorous for n-type, boron for p-type usually), accelerating with several hundred keV, and then driven into the substrate.

This can be useful because conductivity can be increased through doping (the band gap is much more accessible to weakly bound electrons) and electron flow can be promoted between an n and p type until Fermi levels are the same energy in the two substances. Fermi levels are raised in n-type and lowered in p-type.

Anisotropic chemical etchants (KOH, EDP, TMAH) tend to attack silicon along preferred crystallographic directions. P-doping greatly reduces etch rate, which is useful for use a barrier layer to make various wall shapes on etched patterns. Wafer crystallographic orientation also plays a role.

Isotropic and Anisotropic Etching

Wet bulk micromachining can be used on silicon, sapphire, quartz, ceramics, SiC, GaAs, InP, and Ge with orientation-independent (isotropic) or orientation-dependent (anisotropic) wet etchants. For silicon, both types of etch rely on oxidation of silicon, then removal of the hydrated silicate products.

Isotropic etches don’t depend on direction and usually result in rounded features. These etches are diffusion limited. Isotropic etches can be used to reduce stress concentration from rounding. A common isotropic etch is HNA (hydrofluoric acid, nitric acid and acetic acid), the silicon byproduct of which is water soluble.

$\textup{Si}+\textup{HNO}_2+6\textup{HF} \rightarrow \textup{H}_2\textup{SF}_6 + \textup{HNO}_2 + \textup{H}_2\textup{O}+\textup{H}_2$

Anisotropic wet etchants are usually alkaline and depend on exposed crystal orientation. These etches are usually reaction limited. Anisotropic etches usually take place in the presence of OH groups.

$\textup{Si}+2\textup{OH}^- \rightarrow \textup{Si(OH)}_2^{2+}+4\textup{e}^-$

$4\textup{H}_2\textup{O}+4\textup{e}^-\rightarrow 4\textup{OH}^- + 2\textup{H}_2$

$\textup{Si(OH)}_2^{2+}+ 4\textup{OH}^- \rightarrow \textup{SiO}_2\textup{(OH)}_2^{2-}+2\textup{H}_2\textup{O}$

$\therefore \textup{Si}+ 2\textup{OH}^-+2\textup{H}_2\textup{O} \rightarrow \textup{SiO}_2\textup{(OH)}_2^{2-}+2\textup{H}_2$

Silicon Wafer Orientation and Etching Property Modification

Wafer orientation results in many different etch wall configurations. [100] orientation silicon has inward sloping walls of 54.74 degrees.

(111) planes cannot be over-etched and result in V-groves following crystal lines. These can make easily controllable diaphragms (Which are bound by {111} planes for size). {111} results in slanted walls, <100> results in V-shaped groves, and {100} results in a pyramidal grove.

{110} silicon wafers have four vertical {111} planes and two slanted {111} planes. {110} also has narrow trenches and a high aspect ratio. This multifaced base makes poor diaphragms. Bridges perpendicular to a V-groove bounded by (111) planes can be undercut but diaphragm specifications can be difficult to control.

Sacrificial Layers for Undercuts/Overhangs

A sacrificial layer is a layer used only for spacing or structural support, and which will be later removed for the final product. These layers are etched away to leave undercut features.

To create a cantilever, silicon dioxide can be patterned and deposited and then polysilicon deposited above. The polysilicon can then be patterned and etched and finally the structure can be dipped in HF to remove silicon dioxide and result in an undercut.

Surface Micromachining: Structural Layers, Common Sacrificial Layers, and Sacrificial Layer Removal Etchants

Polysilicon is a main structural element (deposited as amorphous silicon and annealed at 580°C). Silicon dioxide is a common sacrificial layer (HF soluble) used with polysilicon. Alternatively, silicon on insulator (SOI) is a single crystal epilayer which can create features as large as 100 micron.

HEXSIL can result in very tall structures as well, in which DRIE scalloped surfaces are smoothed with a wet etch and PSG is applied as a sacrificial layer. CVD of polysilicon is the first structural layer, the substrate is annealed and polished, then another polysilicon structural layer is patterned and etched to connect the structures in the first layer. Finally the entire structure is released with buffered HF.

Polyimide layers use sacrificial aluminum (acid-based etchant).

Silicon Nitrate is an insulator that can use polysilicon as a sacrificial layer (KOH or EDP soluble).

Tungsten can be sputtered over sacrificial silicon dioxide (HF soluble).

From soft lithography, PDMS can be poured as a structural layer over sacrificial Photoresist (Acetone soluble)

Wet release processes cause stiction, or sticking of suspended structures to the substrate. This can be reduced by using a critical point drier, which puts the sample at a specific temperature, pressure, and density such that there is no difference between liquid and gas state.

A complete list of materials, their etchants, and their etch rates is in my post Material Etching and Etch Rates.

Stress and Strain

Stress is force per unit area. Normal stress acts perpendicular to surface and shear acts in the direction of the surface plane.

Strain is the differential of deformation of a solid body in response to force. Strain is dimensionless.

Deep Reactive Ion Etching (DRIE) for High Aspect Ratio Etching (Deep Etches)

Deep reactive ion etch takes advantage of polymeric, chemical-crosslinked passivation species commonly created during glow discharge processes. The Bosch process alternates anisotropic etch with passivation. Generally SF6 is used for etching and C4F8 is used for passivation.

Plasma sources for DRIE are usually inductively coupled plasma and electron-cyclotron resonance. Inductively coupled plasma is generated with an RF magnetic field that creates circumferential field lines (13.56 mHz, high density, low pressure, low energy plasma). Electron cyclotron resonance uses a microwave source, waveguide, magnetic field, and a quartz chamber filled with low pressure gas. Plasma if formed in the gas due to the interaction between microwaves and magnetic fields (intense high density plasma).

Deep reactive ion etch can be used to create high aspect ratio parts (usually needed for microfluidics, more than 200x). Other applications include fabrication of nanowires, electrospray nozzles, or micromirrors. DRIE etch rate is diffusion limited and decreases with increasing aspect ratio.

From Wikipedia, examples of DRIE walls.

The Bosch process, named after the German company Robert Bosch which patented the process, also known as pulsed or time-multiplexed etching, alternates repeatedly between two modes to achieve nearly vertical structures.

1. A standard, nearly isotropic plasma etch. The plasma contains some ions, which attack the wafer from a nearly vertical direction. Sulfur hexafluoride [SF6] is often used for silicon.
2. Deposition of a chemically inert passivation layer. (For instance, C4F8 (Octafluorocyclobutane) source gas yields a substance similar to Teflon.)
Undulating sidewall of a silicon structure created using the Bosch process

Each phase lasts for several seconds. The passivation layer protects the entire substrate from further chemical attack and prevents further etching. However, during the etching phase, the directional ions that bombard the substrate attack the passivation layer at the bottom of the trench (but not along the sides). They collide with it and sputter it off, exposing the substrate to the chemical etchant.

These etch/deposit steps are repeated many times over resulting in a large number of very small isotropic etch steps taking place only at the bottom of the etched pits. To etch through a 0.5 mm silicon wafer, for example, 100–1000 etch/deposit steps are needed. The two-phase process causes the sidewalls to undulate with an amplitude of about 100–500 nm. The cycle time can be adjusted: short cycles yield smoother walls, and long cycles yield a higher etch rate.

Electroplating

Electroplating can be used to make thicker metal films than 5 microns. Nickel electroplating can be used to fabricated parts from a PDMS mold or to make hot embossing molds for polymer fabrication.

To electroplate a substrate, the substrate is placed in a bath of metal ions (negative cathode). The positive anode is made of the coating metal to be deposited (often nickel). Ions are reduced at the substrate surface, becoming insoluble and adsorbed on the substrate surface, when a current is applied.

Substrate Bonding and Limitations

Substrate bonding can include silicon-direct bonding for silicon-silicon bonding, anodic bonding for silicon to glass bonding, or intermediate adhesive layers.

Silicon-silicon bonding is achieved by chemically rendering cleaned surfaces hydrophilic and brought tightly together. Van der Waal forces and high-temperature annealing keep the surfaces together. Silicon is bonded to similar thermal coefficient glass by compression and heating to 300-400°C and then applying about 1000 V dc across the composite with glass as the negative cathode and silicon as the positive anode.

Disadvantages of conventional techniques include adhesive residues, low bonding strength, heating of entire parts during joining, and poor long-term stability.

However, lasers are useful for joining miniaturized devices. The beam can be focused to less than 0.001 double prime (meaning very small geometries can be joined) and causes minimal heat input into the part. Further, the laser’s high quality welds and precise process control enable hermetic sealing. The only disadvantage to laser bonding is the laser moves along lines and as a result requires an n2 order of growth rather than the 1 order of growth that conventional techniques impart.

More examples of etching can be found here, which is one of Luke Lee’s lectures from UC Berkeley.

See my Introduction to Soft Lithography as well!